Ashokkumar, A and Chiplunkar, Niranjan N and Hegde, Govardhan (2009) Sequential and Simultaneous Router for 3D FPGA. International Journal of Computer Science and Network Security, 9 (2). pp. 258-263. ISSN 1738-7906

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Abstract

The Auction Based methodology for routing of 3D FPGA (Field Programmable Gate Arrays) has been implemented using two approaches. One is the Simultaneous approach, where the Nets bid for the Pins they need, and all the bids are processed simultaneously. In the sequential approach, the bidding process is finalized sequentially. It has been observed that in large circuit designs, the simultaneous approach gives better results over sequential approach.

Item Type:	Article
Uncontrolled Keywords:	Field programmable gate arrays, Routing, Nets, Wire, Algorithms.
Subjects:	Engineering > MIT Manipal > Computer Science and Engineering
Depositing User:	MIT Library
Date Deposited:	02 Feb 2015 09:19
Last Modified:	02 Feb 2015 09:19
URI:	http://eprints.manipal.edu/id/eprint/141791

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