Design and analysis of SHE‑assisted STT MTJ/CMOS logic gates

Barla, Prashanth and Joshi, Vinod Kumar and Bhat, Somashekara (2021) Design and analysis of SHE‑assisted STT MTJ/CMOS logic gates. Journal of Computational Electronics, 20. pp. 1964-1976. ISSN 1569-8025

[img] PDF
13402.pdf - Published Version
Restricted to Registered users only

Download (1MB) | Request a copy


We have investigated the spin-Hall effect (SHE)-assisted spin transfer torque (STT) switching mechanism in a three-terminal MTJ device developed using p-MTJ (perpendicular magnetic tunnel junction) and heavy metal materials of high atomic number, which possesses large spin–orbit interaction. Using p-MTJ schematic and complementary-metal-oxide semiconductor (CMOS) logic, we have designed three basic hybrid logic-in memory structure-based logic gates NOR/OR, NAND/ AND, and XNOR /XOR. Then the performances of these hybrid gates are evaluated and the results are compared with the conventional CMOS-based gates in terms of power, delay, power delay product, and device count. From the analysis, it is concluded that SHE-assisted STT MTJ/CMOS logic gates are nonvolatile, consume less power, and occupy a smaller die area as compared to conventional CMOS only logic gates.

Item Type: Article
Uncontrolled Keywords: Magnetic tunnel junction · Spin-hall effect · Spin transfer torque · Nonvolatile · Logic-in-memory
Subjects: Engineering > MIT Manipal > Electronics and Communication
Depositing User: MIT Library
Date Deposited: 09 Dec 2021 10:16
Last Modified: 09 Dec 2021 10:16

Actions (login required)

View Item View Item